低压输入转高压输出LDO设计 - Analog/RF IC 设计讨论 - EETOP 创芯网论坛 (原名：电子顶级开发网)
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小弟近期要做一个LDO模块，前级运放用的低压器件，电源电压AVDD=0 ~ 5V，输出级HV PMOS电源电压为0 ~ 18V，想在输出端得到0 ~ 15V的输出范围，想请问下哪位大神做过这 ... 低压输入转高压输出LDO设计 ,EETOP 创芯网论坛 (原名：电子顶级开发网)
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