vivado中symthsis（综合）和implementation（执行）具体是为了完成什么操作？ - 知乎
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那么，为什么rtl电路和综合后的电路有如此大的区别？ 因为RTL电路是把HDL转化成逻辑电路，而综合后的电路则是用FPGA内部的逻辑资源来实现。 所以最直接的原因就是FPGA底层没有加法器这个东西，只能用其他逻辑资源来实现加法器的功能。
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